THREE-DIMENSIONAL MEMORY DEVICE CONTAINING PLURAL SELECT GATE TRANSISTORS HAVING DIFFERENT CHARACTERISTICS AND METHOD OF MAKING THEREOF

摘要

A stack of material layers includes first material layers, second material layers located between a respective pair of an overlying first material layer and an underlying first material layer, and at least one temporary material layer located between a respective pair of an overlying first material layer and an underlying first material layer. After formation of a memory opening and a memory stack structure, at least one first backside recess is formed by removing the at least one temporary material layer and adjoining portions of a memory film. A physically exposed portion of a semiconductor channel is doped with electrical dopants to form a doped semiconductor channel portion. Second backside cavities are formed by removal of the second material layers. The backside cavities are then filled with a dielectric liner and electrically conductive layers, such as select and control gate electrodes of a memory device.

主权项

1. A monolithic three-dimensional memory structure, comprising:
a stack including an alternating plurality of insulator layers and electrically conductive layers located over a substrate; a memory opening extending through the stack; and a memory film and a semiconductor channel located within the memory opening, wherein the semiconductor channel comprises: a first semiconductor channel portion having a first material composition that includes a semiconductor material; a second semiconductor channel portion contacting an upper end of the first semiconductor channel portion and having a doping of a first conductivity type, wherein the first semiconductor channel portion is intrinsic or has a doping of the first conductivity type at a lower dopant concentration than the second semiconductor channel portion; and a drain region located above the second semiconductor channel portion, having a doping of a second conductivity type that is the opposite of the first conductivity type, and contacting an upper end of the semiconductor channel.