METHOD AND APPARATUS FOR SPECIFYING DEGENERATE FAILURE OF OSCILLATOR

摘要

PURPOSE: To enable efficient and accurate specifying of a degeneration trouble of an oscillator by providing a pair of test shift register latches(SRL) in an integrated circuit chip. CONSTITUTION: A pair of test shift register latches(SRL) is provided in an integrated circuit. A logic 1 signal is applied into a function data input of a test SRL. Then, an oscillator input signal is applied to a data clock input of a first SRL out of the test SRL and an inverted oscillator input signal is applied to the data clock input of a second SRL out of the test SRL. Then, to specify a stack fault in an oscillator, namely, a degeneration trouble, a scan data (SDO) of the test SRL is detected responding to the inverted oscillator input signal. This enables efficient and accurate specifying of the degeneration trouble of the oscillator.