| 摘要 |
PURPOSE:To shorten a time until the next request to a main memory device is issued by issuing a replay in a system controller when a request from an arithmetic processor shows a store instruction for the main memory device. CONSTITUTION:When the request for the main memory device 3 is sent from the arithmetic processor 22 via a signal line L201, the address error check circuit 113 of the reply control means 11 of the system controller 1 receives the request, and it is checked whether or not a request address exceeds the memory capacity of the device 3. When it exceeds the memory capacity, an address error report signal is sent to a reply generation circuit 112 via a signal line L105, and it is sent to a reply sending circuit 114 with the device number (2) of the request origin arithmetic processor 22 via a signal line L106, and the fact that the request address exceeds the memory capacity is confirmed by returning the reply to the request origin arithmetic processor 2 via a signal line L103. |
