| 摘要 |
1. A suppression arrangement for the interrupt line of a microprocessor comprising an interrupt controller connected to the microprocessor characterised in that the inputs (ec) of the controller (1), at which the signals which are intended to interrupt execution of the program of the microprocessor (3) arrive, are directly connected to the inputs (eM) of the microprocessor (3) and that the microprocessor interrupt subprogram comprises a first step of reading of the inputs (eM) thereof, a second step of comparing the duration of the pulses of the signal to a minimum threshold, being intended for recognition of the noise phenomena prior to a third step of deciding on continuation with the sub-program itself in the case of a real interrupt signal or resumption of the main program in the event of noise.
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