发明名称 |
PARALLEL PROCESSING OF BIT STREAM |
摘要 |
PURPOSE: To perform the fast communication control by receiving in series the bit streams arriving during a time interval T and assembling these bit streams in order to process (n) pieces of continuous bits in parallel to each other. CONSTITUTION: A CCU(central control unit) 1 executes a network control program and is connected to a CPU(central processing unit) 3 via a bus 2. An adaptor 5 secures an interface between the user lines 6-1 to 6-i and a serial link 7 and also secures adaptation of the bit streams existing on the user lines to a specific form or its inverse form defined on the link 7. A line scan means 4 has a character service function device 8 which receives the HDLC/SDLC bit streams from the user lines to produce the N-bit characters. These produced characters are offered to the upper layer of the means 4. The device 8 also receives the N-bit characters from the upper layer of the means 4, and these characters are converted into the HDLC bits and sent to the user lines.
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申请公布号 |
JPH0234067(A) |
申请公布日期 |
1990.02.05 |
申请号 |
JP19890093254 |
申请日期 |
1989.04.14 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
JIYAN KARUBUINIYATSUKU;JIYATSUKU FUEROO;BERUNAARU NODAN;KUROODO PAN;ERITSUKU SAN JIYORUJIYU |
分类号 |
H04L29/02;H04L29/06;H04L29/08 |
主分类号 |
H04L29/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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