| 摘要 |
PURPOSE:To attain a highly stable state by synthesizing a signal from an oscillator gated for a prescribed time with the signal from a reference oscillator gated for a time other than the said gated time, comparing the phase of the synthesized signal with that of the signal from the reference oscillator so as to control the oscillator. CONSTITUTION:A signal (a) from a signal input terminal 10 is a signal (c) passing though by the pulse width T of a gate pulse (b) at a 1st gate circuit 1. The output of the reference oscillator 5 is a signal (d) passing through by a pulse width other than the pulse width T at a gate 2nd gate circuit 2 by using an inverted gate pulse passing through a signal inverter 4. The signals c, d are synthesized by a 3rd gate circuit 3 to be a signal (e). The signal (e) is frequency-divided by a 1/N frequency divider 6, resulting in being a signal (f), inputted to a phase comparator 8 and a signal (g) subject to frequency division of the output of the oscillator 5 is inputted to the phase comparator 8 from a 1/N frequency divider 7. A pulse signal (h) with a width proportional to the phase difference of the signals f, g is outputted from the comparator 8, smoothed and amplified by a filter amplifier circuit 9 and outputted from an output terminal 30, then fed back to apply the frequency control of the oscillator whose frequency is to be made stable. |
