| 摘要 |
A phase-locked timebase for electrical and electro-optic sampling has an offset phase-locked loop for controlling the delay between a stimulus reference signal and a sample strobe signal. A reference signal source synchronizes a stimulus source for a device under test and also is input to the phase detector of a phase-locked loop. Also input to the phase-locked loop in the baseband section is a sample phase control signal. The output of the offset phase-locked loop is an integer multiple of the reference signal source that is delayed from the reference signal source by a controlled amount. The output of the offset phase-locked loop is input to a low noise synchronous detection circuit that mixes a response signal from the device with an impulse sample strobe generated from the output of the phase-locked loop. The mixed response signal is detected, integrated and output at a rate equal to or much lower than the sample rate, as determined by the integration time.
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