Digital phase locked loop

摘要

A phase locked loop comprises: a controlled oscillator 21; sampling means 25, 26 for generating a sequence of digital values representing the output of the oscillator at moments synchronised with a reference frequency; a difference unit 28 for generating a feedback signal representing the difference between successive values in the sequence; and an integrator 1 for integrating the difference between the feedback signal and a signal of a desired output frequency; the control signal for the oscillator being dependent on the output of the integrator. The phase locked loop may be used along with an amplitude modulator.