发明名称 Chained hybrid input/output memory management unit
摘要 In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to operate as a tunnel on the interconnect, and wherein the IOMMU is configured translate memory requests passing through the tunnel in the upstream direction. In another embodiment, a system comprises another I/O node configured to bridge another interconnect to the interconnect, wherein the I/O node is the tunnel for the other I/O node.
申请公布号 US7548999(B2) 申请公布日期 2009.06.16
申请号 US20070623615 申请日期 2007.01.16
申请人 ADVANCED MICRO DEVICES, INC. 发明人 HAERTEL MICHAEL;HUMMEL MARK D.;STRONGIN GEOFFREY S.;LUECK ANDREW W.;ALSUP MITCHELL
分类号 G06F13/12;G06F3/00;G06F9/26;G06F9/34;G06F13/00;G06F13/28;G06F13/36;G06F13/38;G06F13/42;G06F15/16 主分类号 G06F13/12
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