主权项 |
1. A circuit designed to implement a neural network, comprising at least:
a series of elementary modules, called neuro-blocks, designed to implement an assembly of neurons, said neuro-blocks being grouped together in branches, a branch being composed of a group of neuro-blocks and of a broadcasting bus, the neuro-blocks being connected to said broadcasting bus; a routing unit connected to the broadcasting bus of said branches, carrying out at least the routing and the broadcasting of data to and from said branches; a transformation module connected to the routing unit via an internal bus and designed to be connected, at the input of said circuit, to an external databus, said module carrying out the transformation of the format of the input data carried by said external bus, a message of N input words with x bits coded in parallel being transformed into a message of N words with x bits coded in series, the N words being parallelized over the internal bus at the output of said module, one wire of the bus being dedicated to one word, the words being broadcast over the broadcasting buses of the branches and the other internal components of said circuit via the routing unit with the same serial coding, in such a manner that all the processing operations internal to said circuit are carried out according to a serial communications protocol. |