发明名称 SIGNAL REGENERATION CIRCUIT
摘要 <p>A signal regeneration circuit is of a type using first and second phase-locked loop (PLL) circuits each having a phase comparator, a loop filter and a voltage controlled oscillator (VCO) in which the phase of an input signal is shifted in a desired amount. The first PLL operates as an input signal frequency averaging means, and the second PLL operates to satisfy the final performance as a signal regenerative circuit based on the output of the VCO in the first PLL, thereby producing as a regenerative signal the output of the VCO in the second PLL. Thus, this signal regeneration circuit can regenerate a clear signal having no noise from an unclear input signal deeply immersed in noise.</p>
申请公布号 CA1180068(A) 申请公布日期 1984.12.25
申请号 CA19820417564 申请日期 1982.12.13
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 SAWA, BUNTARO;HONDA, NAOTO
分类号 H03L7/10;H03L7/07;(IPC1-7):H03B5/00 主分类号 H03L7/10
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