发明名称 SEMICONDUCTOR MEMORY AND MANUFACTURE THEREOF
摘要 PURPOSE:To secure the large capacity of a capacitor at less occupied space eliminating the thickness control of an element isolation insulating film by a method wherein the element isolation insulating film is provided with less width and sufficient thickness while grooves with specific width are formed between each island type semiconductor layer and the element isolation insulating film. CONSTITUTION:The first multiple rectangular masks 2 are formed on a P-type Si substrate 1; the second masks 3 are formed on the sidewalls of the first masks 2 to form the first fine and deep grooves 4 by the reactive ion etching process; and element isolating insulating films 6 are filling-formed. Next, masks 7 are formed on the parts excluding the end regions of an island type Si layer 5; the masks 3 are selectively etching-removed and grooves 8 shallower than the first grooves 4 are formed by the reactive ion etching process. Later, the masks 2, 7 are removed and after forming a capacitor insulating film 9 by thermal oxidation, N<-> type layers 11 are formed to form capacitor electrodes 10 by depositing and patterning polycrystalline silicon film. Successively, gate electrodes 13 are formed through the intermediary of gate insulating film 12 and then N<+> type layers 14 are formed to manufacture an MOS transistor. Finally, an Al interconnection is arranged.
申请公布号 JPS62193274(A) 申请公布日期 1987.08.25
申请号 JP19860035470 申请日期 1986.02.20
申请人 TOSHIBA CORP 发明人 FUSE TSUNEAKI
分类号 H01L27/10;H01L21/8242;H01L27/108 主分类号 H01L27/10
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