发明名称 Highly linear digital/analog conversion device
摘要 A digital-to-analog conversion device equipped with a first and second delta-sigma modulator (F1,F2) of the second order, a first and second differentiator (9,10) a three-stage digital-to- analog converter (DAC)(3DA) and a low-pass (TP), in which the output signal of the low pass is simultaneously the output signal (A) of the device. A signal (k) between a first and second delay stages (5,7) of the first modulator (F1) is fed to the input of the second modulator (F2), and output signal (RA) of the latter is fed to a feedback input (RE) via two series-connected differentiators (9,10). E three-stage digitiser (quantiser) (3) is provided in the first modulator and supplies a first and second range bit (B1,B2) which are converted by the three-stage DAC to an analog signal (A3) for feeding to the low-pass (TP).
申请公布号 DE19722434(C1) 申请公布日期 1998.10.01
申请号 DE19971022434 申请日期 1997.05.28
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 MAUTHE, MANFRED, DIPL.-ING., 85655 GROSHELFENDORF, DE;SAUERBREY, JENS, DIPL.-ING., 81549 MUENCHEN, DE
分类号 H03M7/36;(IPC1-7):H03M3/02;H03M1/66 主分类号 H03M7/36
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