摘要 |
<p>PROBLEM TO BE SOLVED: To decrease a leak current in a word line driving circuit at erasing a region en bloc by a non-volatile semiconductor memory using a memory cell having a floating gate. SOLUTION: When a chip erasing signal CER is made to 'H', all address liens AL0-AL9 are driven to 'H' by an address line driving sections 10, 20, and all pre-decoders A40 and pre-decoders B50 are selected. Thereby, a signal XP of 12 V is given to a row decoder 60 from the pre-decoder A40. The row decoder 60A has the first and the second semiconductor switches controlled by signals BS, nBS given from the pre-decoder B. When the first semiconductor switch is turned on, a signal XP is outputted to a word line WL. When the second semiconductor switch is turned off, the signal XP and the chip erasing signal CER are applied to the both ends. Thereby, voltage between terminals is reduced by the level 'H' of the chip erasing signal CER, and a leak current is decreased.</p> |