| 摘要 |
<P>PROBLEM TO BE SOLVED: To eliminate the need to add a signal line for the transfer of variable-length data when a device using a method of clock synchronized serial data transfer is used for the transfer of variable-length data and to keep the numbers of added circuits and software processes as few as possible. <P>SOLUTION: A data sending part 1 sends N data sampling indication signals 13 to a data receiving part 2 in synchronization with data for indicating to the data receiving part 2 that data are sent for each sending of data composed of predetermined bits. If there are no data transferred from the data sending part 1 and if no transfer unit data sampling indication signal 13 sent from the data sending part 1 in synchronism with data reception are detected, the data receiving part 2 determines that the data transfer of data signals 12 has ended. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
