| 主权项 |
1. An array substrate comprising a plurality of first pixel units and a plurality of second pixel units, the first pixel units and the second pixel units are disposed interlaced; wherein
a first input terminal of a driving circuit of a sub-pixel unit of each of the first pixel unit receives a first pulse signal, a second input terminal of the driving circuit of the sub-pixel unit of each of the first pixel unit receives a second pulse signal, a first input terminal of a driving circuit of a sub-pixel unit of each of the second pixel unit receives the second pulse signal, a second input terminal of the driving circuit of the sub-pixel unit of each of the second pixel unit receives the first pulse signal, the phases of the first pulse signal and the second pulse signal are reversed, making the first pixel units and the second pixel units to be driven alternatingly, and cycle durations of the first pulse signal and the second pulse signal are the same as a frame cycle duration of the array substrate; wherein the driving circuit comprises a first driving TFT (thin film transistor), a second driving TFT, a third driving TFT, a fourth driving TFT, and a storing capacitor; each sub-pixel unit of each of the first pixel unit and the second pixel unit comprises an LED, the LED comprises a first terminal and a second terminal, the first terminal of the LED couples with a driving source; a gate electrode of the first driving TFT couples with a gate line, a first terminal of the first driving TFT couples with a second terminal of the third driving TFT, a first terminal of the second driving TFT couples with a second terminal of the LED, a second terminal of the second driving TFT couples with a GND (ground); a first terminal of the third driving TFT couples with a data line; a first terminal and a second terminal of the fourth driving TFT couples with two terminals of the storing capacitor, the second terminal of the fourth driving TFT couples with the GND; a gate electrode of the second driving TFT couples with a second terminal of the first driving TFT and the first terminal of the fourth driving TFT; the first input terminal of the driving circuit of the sub-pixel unit of each of the first pixel unit and the second pixel unit is the gate electrode of the third driving TFT, and the second input terminal of the driving circuit of the sub-pixel unit of each of the first pixel unit and the second pixel unit is the gate electrode of the fourth driving TFT. |
