发明名称 |
Systems for controlling high frequency voltage mode switching regulators |
摘要 |
A circuit for controlling a switching regulator is provided. The circuit includes a first input to receive a feedback signal from the switching regulator proportional to an output voltage of the switching regulator, a second input to receive a voltage reference signal, an output to be coupled to an input of the switching regulator, an error amplifier having a first input terminal coupled to the first input to receive the feedback signal, a second input terminal coupled to the second input to receive the voltage reference signal, and an output terminal coupled to the output, and a compensation network coupled between the second input and the output. The compensation network includes a series combination of a first capacitance and a first resistance coupled between the second input and a node, a second resistance coupled between the node and the output, and a second capacitance coupled to the node. |
申请公布号 |
US9397570(B2) |
申请公布日期 |
2016.07.19 |
申请号 |
US201414504820 |
申请日期 |
2014.10.02 |
申请人 |
ADVANCED ANALOGIC TECHNOLOGIES INCORPORATED |
发明人 |
Wrathall Robert Stephen |
分类号 |
H02M3/158;H02M1/08;H02M1/00 |
主分类号 |
H02M3/158 |
代理机构 |
Lando & Anastasi, LLP |
代理人 |
Lando & Anastasi, LLP |
主权项 |
1. A circuit for controlling a switching regulator, the circuit comprising:
a first input to receive a feedback signal from the switching regulator proportional to an output voltage of the switching regulator; a second input to receive a voltage reference signal; an output to be coupled to an input of the switching regulator; an error amplifier having a first input terminal coupled to the first input to receive the feedback signal, a second input terminal coupled to the second input to receive the voltage reference signal, and an output terminal coupled to the output; and a compensation network coupled to the second input terminal of the error amplifier and the output terminal of the error amplifier, the compensation network including a series combination of a first capacitance and a first resistance coupled between the second input terminal of the error amplifier and a node, a second resistance coupled between the node and the output terminal of the error amplifier, and a second capacitance coupled between the node and ground. |
地址 |
San Jose CA US |