Battery charge protection system

摘要

A system comprises a battery including one or more cells, an energy source, a load, and a battery protection circuit coupled to the battery, the energy source and the load. The circuit determines if the charge of each cell is at/above a predetermined, band gap supplied threshold voltage, which results in disconnecting of the battery from the energy source. The circuit also may determine if the charge of any cell is at/below a second predetermined level, which may result in disconnecting of the battery from the load. The circuit may be radiation-hardened (e.g., via redundancy), through the use of two sets of field effect transistors, two logic gates, two groups of comparator circuits, and two relays. The circuit provides multiply redundant protection comprising: redundantly assessing the overvoltage determination; redundantly triggering battery isolation; and preventing inadvertent isolation and non-charging, occurring absent overvoltage, through redundant first and second relays.

主权项

1. A multiply redundant battery charge protection circuit, for use in preventing a voltage of a rechargeable battery with one or more cells from crossing a threshold voltage, said multiply redundant battery charge protection circuit comprising:
a first group and a second group of comparator circuits, each said group having a respective comparator circuit for each of the one or more cells of the battery, said respective comparator circuit of each of said first and second groups configured to independently supply a digital output to indicate if the voltage of the respective cell crosses a threshold voltage; a first logic gate and a second logic gate, said first and second logic gates configured to provide a respective “or” operation for said comparator circuits of said first and second groups, each of said logic gates configured to supply a digital signal to indicate when one comparator circuit within its respective group supplies said digital output; a first transistor in parallel with a second transistor, with each said first and second transistors having its gate terminal respectively coupled to said first logic gate to receive said digital output therefrom; a third transistor in parallel with a fourth transistor, with said third and fourth transistors respectively in series with said first and second transistors, and with each said third and fourth transistors having its gate terminal respectively coupled in parallel to said second logic gate, to independently receive said digital output therefrom; and a first relay and a second relay; said first relay coupled in series with said third transistor; said second relay coupled in series with said fourth transistor; each said first and second relays comprising a respective coil configured to be energized to isolate a portion of said circuit upon either said first or said third transistor turning on after receiving said digital signal of said corresponding logic gate, or either said second or said fourth transistor turning on after receiving said digital signal of said corresponding logic gate.