发明名称 Hot carrier injection compensation
摘要 Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly.
申请公布号 US9419565(B2) 申请公布日期 2016.08.16
申请号 US201414242373 申请日期 2014.04.01
申请人 Peregrine Semiconductor Corporation 发明人 Nobbe Dan William;Olson Chris;Kovac David
分类号 H03F3/04;H03F1/30;H04B1/44;H04B17/12;H04B7/015;H04B7/02;H04B15/00;H04B1/18;H03F3/193;H03F3/21 主分类号 H03F3/04
代理机构 Jaquez Land Greenhaus LLP 代理人 Jaquez Land Greenhaus LLP ;Jaquez, Esq. Martin J.;Steinfl, Esq. Alessandro
主权项 1. A radio frequency (RF) amplifier arrangement comprising: a first transistor stack configured, during operation, to amplify an RF signal at an input gate of the first transistor stack and provide an amplified version of the RF signal at an output terminal of the first transistor stack; a second transistor stack configured, during operation, to amplify the RF signal at an input gate of the second transistor stack and provide an amplified version of the RF signal at an output terminal of the second transistor stack; a first switch operatively connected between the output terminal of the first transistor stack and the output terminal of the second transistor stack, the first switch being configured, during operation, to provide a short or an open between the output terminals of the first and second transistor stacks; a second switch operatively connected between the output terminal of the second transistor stack and a first terminal of a resistor, the second switch being configured, during operation, to provide a short or an open between the output terminal of the second transistor stack and the first terminal of the resistor, and a bias control module operatively connected to the first terminal of the resistor via an input sense terminal of the bias control module and operatively connected to the input gate of the first transistor stack and the input gate of the second transistor stack via an output terminal of the bias control module.
地址 San Diego CA US