发明名称 |
Nitride layer protection between PFET source/drain regions and dummy gate during source/drain etch |
摘要 |
Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; growing first and second eSiGe source/drain regions in the first and second source/drain cavities, respectively; and removing the first dummy gate and the second dummy gate stack. |
申请公布号 |
US9419139(B2) |
申请公布日期 |
2016.08.16 |
申请号 |
US201414560428 |
申请日期 |
2014.12.04 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
Wu Xusheng;Mo Hongxiang;Zhang Qi;Min Byoung-Gi;Park Jeasung |
分类号 |
H01L29/78;H01L29/161;H01L29/165;H01L29/66;H01L21/02;H01L21/306 |
主分类号 |
H01L29/78 |
代理机构 |
Ditthavong & Steiner, P.C. |
代理人 |
Ditthavong & Steiner, P.C. |
主权项 |
1. A method comprising:
forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; forming first and second low-k dielectric spacers at opposite sides of the first and second dummy gate stacks, respectively; growing first and second embedded silicon germanium (eSiGe) source/drain regions in the first and second source/drain cavities, respectively; removing the first dummy gate and the second dummy gate stack; removing the nitride protection layer from the first dummy gate stack, leaving the oxide layer in the first dummy gate stack; removing the nitride protection layer and the oxide layer from the second dummy gate stack; and replacing the first dummy gate with a first high-k dielectric layer and a first metal gate, wherein the first high-k dielectric layer is formed between the first low-k dielectric spacers and along side edges of the oxide layer, resulting in filling of gaps between the oxide layer and the first low-k dielectric spacers. |
地址 |
Grand Cayman KY |