发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, a silicon film, for the memory gate electrode of a memory cell in a nonvolatile memory is formed via an insulating film so as to cover the control gate electrode of the memory cell. After the silicon film and the insulating film are removed from a peripheral circuit region, a silicon film for the gate electrode of a MISFET is formed over the silicon film over a memory cell region of the semiconductor substrate and over the peripheral circuit region thereof. After the silicon film is patterned to form a gate electrode over the peripheral circuit region, the insulating film is removed from the memory cell region. Then, over the silicon film over the memory cell region, an oxide film is formed. Subsequently, the oxide film, and, the silicon film over the silicon film over the memory cell region are etched back to form the memory gate electrode adjacent to the control gate electrode via the insulating film.
申请公布号 US2016247931(A1) 申请公布日期 2016.08.25
申请号 US201615047732 申请日期 2016.02.19
申请人 Renesas Electronics Corporation 发明人 MITSUIKI Akira
分类号 H01L29/788;H01L21/28 主分类号 H01L29/788
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor device including a memory cell in a nonvolatile memory formed in a first region of a semiconductor substrate and a MISFET formed in a second region of the semiconductor substrate, the method comprising the steps of: (a) providing the semiconductor substrate; (b) forming a first gate electrode for the memory cell over the first region of the semiconductor substrate via a first insulating film; (c) forming a first conductive film for a second gate electrode of the memory cell over the semiconductor substrate via a second insulating film so as to cover the first gate electrode; (d) removing the first conductive film and the second insulating film from the second region to leave the first conductive film and the second insulating film over the first region; (e) after the step (d), forming a second conductive film for a third crate electrode of the MISFET over the first conductive film over the first region and over the second region of the semiconductor substrate via a third insulating film; (f) patterning the second conductive film to form the third gate electrode for the MISFET over the second region; (g) after the step (f), removing the third insulating film from the first region; (h) after the step (g), forming a fourth insulating film over the first conductive film over the first region; and (i) etching back the fourth insulating film and the first conductive film to form the second gate electrode for the memory cell which is adjacent to the first gate electrode via the second insulating film.
地址 Tokyo JP