PAD FOR MULTIPLE PIN SEMICONDUCTOR ELEMENT TEST

摘要

PURPOSE:To eliminate defectives in an assembly process and to improve yield by carrying out die sorter test in a wafer state without restriction by a probe card. CONSTITUTION:A first pad layer 4 consisting of a conductive metal layer such as Al or Al alloy (Al-Si, Al-Si-Cu) is formed in a part of a multiple layer wiring layer or in a space part between an I/O buffer cell region and a periphery of a semiconductor chip as a multiple pin semiconductor device pad which is indispensable for connection with an external device. A second pad layer 5 consisting of conductive metal which functions for a die sorter test is formed with an increased pitch in addition to the first pad layer 4. A metallic fine line 6 such as Al is fused between the pad layer 5 and the first pad layer 4 by a contact bonding method to realize an electrical conduction state. Then, a usual die sorter process is carried out by a second pad layer 5.