| 摘要 |
<p>PURPOSE:To delay outputs by a counted number of pulse periods by composing an output delay circuit of an OR circuit for an exclusive OR of the output of a counter for counting a pulse period and the output of a comparator, and an AND circuit for inputting a signal of logic sum of the output of the OR circuit and the output of an oscillator as a clock input signal of the counter. CONSTITUTION:When a photodiode 10 receives a light, the output voltage of an amplifier 11 is raised. When the output of the amplifier 11 exceeds one side input voltage of a comparator 12, i.e., a reference voltage, the output of the comparator 12 becomes from low to high. In this case, if the output of a counter 17 in an output delay circuit 13 maintains low, the output of an OR circuit 18 which inputs an exclusive logic sum of the output of the comparator 12 and the output of the counter 17 becomes high. As a result, the pulse of an oscillator 16 is inputted as a clock input signal of the counter 17 by an AND circuit 19 which inputs a logic sum of the output of the OR circuit 18 and the output of the oscillator 16 as a circuit response having a time delay equal to a counted number of the pulse periods of the oscillator 16.</p> |
