| 摘要 |
PURPOSE:To recover synchronization operation by inverting a control signal of an oscillation circuit and applying a reference voltage to a 2nd oscillation circuit when a reception signal is missing in a parallel phase locked loop(DUAL-PLL) circuit. CONSTITUTION:A detection circuit 11 of a DUAL-PLL circuit detects the presence of a reception signal 10, a 1st PLL circuit comprising an oscillation circuit 12, a comparator 13 and an LPF 15 follows the input signal to control it and a 2nd PLL circuit comprising an oscillation circuit 16, a comparator 17 and an LPF 19 follows a clock signal to control it, then the entire circuit acts as the DUAL-PLL circuit. When the reception signal is missing, an output of the detection circuit 11 goes to a low level, a changeover switch 14 switches a control signal to an output of the LPF 19, and the oscillation circuit 16 is controlled by a reference voltage circuit 20 by a changeover circuit 18, an output of the comparator 17 is inverted to synchronize the oscillation circuit 12 to a clock signal of the oscillation circuit 16. |
