| 摘要 |
PURPOSE:To relax a limitation on a production process, to enhance reliability and to lower costs by a method wherein a common-use lead is piled up on the circuit formation face of a semiconductor chip and at the outside of its outer circumference. CONSTITUTION:A common-use inner lead 2A is loaded, via an insulating adhesive or an insulating tape 3, on the circuit formation face of a semiconductor chip 1. The lead 2A is constituted of the following: a semiconductor chip ring 2A1 used to bond and fix the chip 1; and four suspension leads 2A2 used to support corner parts of the ring 2A2. One out of the leads 2A2 is formed collectively together with an outer lead 2B. A plurality of leads 4A for signal use are formed at the outside of the peripheral part of the chip 1; the chip 1 and the leads 4A are connected electrically by bonding wires 5; this assembly is sealed with a molding resin 6. Then, since an area used to form electrode pads is increased on the circuit formation face of the chip 1, a multipin system can be realized. Thereby, a limitation on a production process regarding a wire bonding operation is relaxed, and high reliability and low costs can be realized. |
