发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To shorten a write time with a few number of terminals, by supplying a ternary level to a chip enable terminal, and writing a page based on the combination of a chip selection signal, a non-chip selection signal, and an output enable signal. CONSTITUTION:By setting a chip enable signal CE at a high voltage, an internal chip selection signal CE goes to a high level, and an address buffer is activated. Also, based on the high level of a program signal formed by the supplying of the high voltage, and the low level of the output enable signal OE, a signal SO is formed by a decode signal of inputted address signals AY0 and AY1, and a first write signal can be fetched. After that, by setting the output enable signal OE at the high level, and the chip enable signal CE at the low level, the write operation can be performed simultaneously in each memory array.</p>
申请公布号 JPS63106994(A) 申请公布日期 1988.05.12
申请号 JP19860251646 申请日期 1986.10.24
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD;HITACHI VLSI ENG CORP;HITACHI TOBU SEMICONDUCTOR LTD 发明人 HARADA KENICHI;SHOJI KAZUYOSHI;KASAI HIDEO
分类号 G11C17/00;G11C16/02 主分类号 G11C17/00
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