发明名称 IMAGE DECODER
摘要 PROBLEM TO BE SOLVED: To improve picture quality by enabling frame interpolating processing without increasing memory capacity. SOLUTION: Encoded data are decoded by a stream decode circuit 2, an IDCT circuit 3 and an MC circuit 4. An AGU 11 stores decoded data from the MC circuit 4 into a memory 7. Concerning the decoded data of a B picture, the AGU 11 writes only the decoded data required for image display into a B picture area. Thus, a margin is generated in the memory capacity, the decoded data of the B picture can be held for the period of two fields, and the same decoded data can be read out twice for display processing. Thus, the frame interpolating processing is performed at a display processing circuit 8 and an extended image with high picture quality can be provided.
申请公布号 JPH09214956(A) 申请公布日期 1997.08.15
申请号 JP19960016666 申请日期 1996.02.01
申请人 TOSHIBA CORP;TOSHIBA AVE CORP 发明人 KURIHARA KOICHI;ABE SHUJI;YODA SHINJI
分类号 H03M7/00;H04N19/00;H04N19/423;H04N19/426;H04N19/46;H04N19/503;H04N19/59;H04N19/61;H04N19/625;H04N19/70;H04N19/80;H04N19/85;H04N19/91 主分类号 H03M7/00
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