| 摘要 |
A semiconductor wafer has a plurality of dies separated by scribe line areas. Each die has a first pad for receiving a power supply voltage and a second pad for receiving a ground potential. The scribe line areas include at least a first metal line and a second metal line respectively connected to the first pad and the second pad of each of the plurality of dies. A probe card is brought into contact with a first die to initiate a built-in self test (BIST) in the first die. Once the BIST operation is properly initiated, the probe card is moved to a second die to similarly initiate the BIST operation in the second die. The probe card is moved from the first die to the second die while the BIST operation in first die is in progress. In this manner, the BIST operation in multiple dies overlap, thus reducing the overall wafer sort testing time compared to the conventional method of sequential testing of dies. The large capacitance associated with the first layer metal is capable of storing sufficient charge to provide the required power to the dies which have not completed the BIST operation but from which the probe card and thus the tester power is removed.
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