发明名称 Guided capture, creation, and seamless integration with scalable complexity of a clock specification into a design flow of an integrated circuit
摘要 A method and tool that capture, create, and integrate a clock specification to achieve a correct-by-construction design flow of a semiconductor product from a partially manufactured semiconductor platform. The clocking elements of the design flow are combined and displayed in a plurality of context-driven views. Within each view, details of the clock specification are presented in the context of the information. A user may zoom in/out through the plurality of views of the design flow for more or less detailed information. Each view can combine the logical, structural, architectural, cost, timing, and other features of the clock in a particular context. A user can zoom in to select and manipulate circuit elements. The user can then zoom out and the present invention determines how changes affect other clocks in the same or other modules and/or the same clock in other modules.
申请公布号 US7290224(B2) 申请公布日期 2007.10.30
申请号 US20040027266 申请日期 2004.12.31
申请人 LSI CORPORATION 发明人 BYRN JONATHAN;LINDBERG GRANT
分类号 G06F17/50;G06F1/04;G06F9/44;G06F9/45 主分类号 G06F17/50
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