WIDE RANGE MULTI-PHASE DELAY LOCKED LOOP CIRCUIT INCLUDING DELAY MATRIX

摘要

A wide range multi-phase delay locked loop circuit having a delay matrix is provided to minimize a phase error of a delay with a resistance network by using the delay matrix having the resistance network. A wide range multi-phase delay locked loop circuit having a delay matrix includes a delay matrix(11), an interpolator(12), a phase detector(14), a charge pump(15), and a bias control circuit(16). The delay matrix is composed of M delay chains having N delays cells which are coupled in series. The interpolator receives a clock signal, and generates M output signals having an equivalent phase difference corresponding to Td/M, and applies the output signals to the delay matrix. The Td is a delay time of the delay cells. The phase detector receives an output signal of a first delay cell and an output signal of a last delay cell of a first delay chain of the delay chains. The phase detector detects a phase difference between two output signals. The charge pump generates a control voltage in response to an output signal of the phase detector. The bias control signal receives a control voltage, and generates bias voltages for controlling the delay cells.