| 摘要 |
The comparitive signal generated by the motor rotation is not n times of the reference signal where n is the certain constant, the reference signal is multiplied to be n times to the comparative one by the PLL circuit, and divided to have the same frequency to the reference one so that the phase of the motor is controlled precisely. The circuit includes an analog PLL circuit oscillating the frequency (FLCM) having the least common mutiple of the rotation (fc), comparative (fa), and reference frequencies, a first divider dividing the comparative frequency (fa) having n times of the reference frequency (fb) until it becomes same to the reference one, and a second divider dividing the FLCM until it becomes same to the comparative one (fa).
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