发明名称 Multi-composition gate dielectric field effect transistors
摘要 A first gate structure and a second gate structure are formed over a semiconductor material layer. The first gate structure includes a planar silicon-based gate dielectric, a planar high-k gate dielectric, a metallic nitride portion, and a first semiconductor material portion, and the second gate structure includes a silicon-based dielectric material portion and a second semiconductor material portion. After formation of gate spacers and a planarization dielectric layer, the second gate structure is replaced with a transient gate structure including a chemical oxide portion and a second high-k gate dielectric. A work-function metal layer and a conductive material portion can be formed in each gate electrode by replacement of semiconductor material portions. A gate electrode includes the planar silicon-based gate dielectric, the planar high-k gate dielectric, and a U-shaped high-k gate dielectric, and another gate electrode includes the chemical oxide portion and another U-shaped high-k gate dielectric.
申请公布号 US9397175(B2) 申请公布日期 2016.07.19
申请号 US201514881766 申请日期 2015.10.13
申请人 GLOBALFOUNDRIES INC. 发明人 Alptekin Emre;Kwon Unoh;Lai Wing L.;Li Zhengwen;Narayanan Vijay;Ramachandran Ravikumar;Vega Reinaldo A.
分类号 H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119;H01L29/40;H01L29/51;H01L27/088;H01L29/66;H01L21/8234;H01L29/49 主分类号 H01L29/76
代理机构 Scully, Scott, Murphy & Presser, P.C. 代理人 Scully, Scott, Murphy & Presser, P.C.
主权项 1. A semiconductor structure comprising a first field effect transistor and a second field effect transistor located on a semiconductor substrate, said first field effect transistor comprising a first gate structure and said second field effect transistor comprising a second gate structure, wherein said first gate structure comprises a stack of a planar semiconductor oxide-based dielectric portion, a planar high dielectric constant (high-k) dielectric portion, and a first gate electrode, and wherein said second gate structure comprises a stack of a chemical oxide layer contacting a surface of said semiconductor substrate, a U-shaped high-k dielectric portion, and a second gate electrode laterally surrounded by vertical portions of said U-shaped high-k dielectric portion.
地址 Grand Cayman KY