METHODS FOR DISTRIBUTING POWER IN LAYOUT OF IC

摘要

A method for distributing power in the layout of an integrated circuit is provided. The integrated circuit includes at least one macro block. A first physical layout of the macro block is obtained, wherein the macro block includes a plurality of standard cells. The first physical layout is divided into a plurality of partitions according to an IR simulation result of the first physical layout. A plurality of power isolation cells are inserted between the partitions. A second physical layout is obtained according to the partitions and the power isolation cells. A macro placement of the macro block is obtained according to the second physical layout. Each of the partitions further includes a low drop out (LDO) regulator.

主权项

1. A method for distributing power in a layout of an integrated circuit, wherein the integrated circuit comprises at least one macro block, comprising:
obtaining a first physical layout of the macro block, wherein the macro block comprises a plurality of standard cells; dividing the first physical layout into a plurality of partitions according to an IR simulation result of the first physical layout; inserting a plurality of power isolation cells between the partitions; obtaining a second physical layout according to the partitions and the power isolation cells; and obtaining a macro placement of the macro block according to the second physical layout, wherein each of the partitions further comprises a low drop out (LDO) regulator.