发明名称 Method for calibrating a pipelined continuous-time sigma delta modulator
摘要 Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a pipelined CT SDM is provided that has an architecture that is conducing to being calibrated. Namely, the system includes a digital filter and other features that can be adjusted to account for input imbalance errors and well as quantization leakage noise.
申请公布号 US9413382(B2) 申请公布日期 2016.08.09
申请号 US201514606533 申请日期 2015.01.27
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 Satarzadeh Patrick;Srinivasan Venkatesh;Sestok Charles
分类号 H03M1/10;H03M3/00 主分类号 H03M1/10
代理机构 代理人 Albin Gregory J.;Cimino Frank D.
主权项 1. A method for calibrating at least a portion of a pipelined continuous-time (CT) sigma-delta modulator (SDM), wherein the CT SDM includes a first stage, a second stage, a first digital-to-analog converter (DAC) coupled between the first and second stages, and a digital filter that is coupled to the first and second stages, wherein the second stage includes a second DAC, the method comprising: determining a ratio of a gain of the first DAC to a gain of the second DAC; and adjusting a gain of a digital filter to be approximately equal to the ratio of the gain of the first DAC to the gain of the second.
地址 Dallas TX US