发明名称 Method for fabricating a multi-gate device
摘要 A device includes a wafer substrate including an isolation feature, at least two fin structures embedded in the isolation feature, and at least two gate stacks disposed around the two fin structures respectively. A first inter-layer dielectric (ILD) layer is disposed between the two gate stacks, with a dish-shaped recess formed therebetween, such that a bottom surface of the recess is below the top surface of the adjacent two gate stacks. A second ILD layer is disposed over the first ILD layer, including in the dish-shaped recess. The second ILD includes nitride material; the first ILD includes oxide material.
申请公布号 US9431397(B2) 申请公布日期 2016.08.30
申请号 US201514623204 申请日期 2015.02.16
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Kuo Chih-Wei;Chao Yuan-Shun;Chen Hou-Yu;Yang Shyh-Horng
分类号 H01L27/088;H01L29/78;H01L29/66;H01L27/12;H01L27/092;H01L23/00 主分类号 H01L27/088
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A semiconductor device comprising: a substrate including an isolation feature; at least two fin structures embedded in the isolation feature; at least two gate stacks disposed around the at least two fin structures respectively; an etch stop layer extending between the at least two gate stacks; a first inter-layer dielectric (ILD) layer disposed on the etch stop layer and between the at least two gate stacks, wherein a portion of the first ILD layer has a top surface lower than a top surface of the at least two gate stacks, thereby forming a recess comprising a bottom surface and sidewall surfaces composed of the first ILD layer; and a second ILD layer disposed over the first ILD layer and in the recess, wherein the second ILD layer has a top surface that is approximately the same as the top surface of the at least two gate stacks and being contact with the sidewall surfaces and the bottom surface, wherein the second ILD layer disposed in the recess has a first thickness over the isolation feature and a second thickness adjacent one of the at least two gate stacks, the second thickness being different than the first thickness.
地址 Hsin-Chu TW