发明名称 Time-to-digital converter (TDC) with offset cancellation
摘要 Described is an apparatus which comprises: a switching device to receive first and second inputs, and to generate first and second outputs; and a time-to-digital converter (TDC) core to receive the first and second outputs, and to generate a third output, wherein the switching device is operable to couple the first input to the first output or to couple the first input to the second output according to a control input.
申请公布号 US9442463(B2) 申请公布日期 2016.09.13
申请号 US201314134310 申请日期 2013.12.19
申请人 Intel Corporation 发明人 Seidel Mark N.
分类号 G04F10/00 主分类号 G04F10/00
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. An apparatus comprising: a switching device to receive first and second inputs, and to generate first and second outputs; a time-to-digital converter (TDC) core to receive the first and second outputs, and to generate a third output; a feedback mechanism to generate a control input, wherein the switching device is operable to couple the first input to the first output and the second input to the second output or to couple the first input to the second output and the second input to the first output according to the control input to cancel timing offset in the TDC; and a multiplexer to receive the third output and an inverted version of the third output, the multiplexer operable to select as a fourth output to be received by the feedback mechanism one of the third output or the inverted version of the third output according to the control input.
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