| 摘要 |
A bus control circuit controlled by a microprogram in which a bus is employed to transfer data among a plurality of processing units. A data storage circuit connected to the bus stores the data appearing thereon which is used for carrying out microinstructions until the time when a particular microinstruction is inhibited from being executed. The storage circuit stores the last data which appeared on the bus for the microinstruction but receives an interrupt signal which prevents the storage of any new data. Then, when the execution of the microinstruction is resumed, the last stored data in the storage circuit is transferred to the data bus for performance of the microinstruction.
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