发明名称 CLOCK SIGNAL SWITCHING DEVICE
摘要 PURPOSE:To prevent the malfunction of an electronic equipment for which a switched clock signal is impressed and to improve reliability for the switching operation of the device itself by actually switching the clock signal with a real switching signal inputted after being delayed for prescribed time rather than a switching timing signal. CONSTITUTION:A switching timing signal b1 with prescribed succeeding time inputted from an external controller such as a computer or the like is converted to correction switching timing signals g1-g3 for each clock signal synchronized to signal level coversion timing for the rise or the fall of respective clock signals a1-a3 by respective latch circuits 14a-14c. AND signals h1-h3 of the clock signals a1-a3 corresponding to these correction switching timing signals g1-g3 are inputted to a signal switching circuit 15. Namely, since the respective correction switching timing signals g1-g3 are synchronized with the respective clock signals a1-a3 by the operations of the respective latch circuits 14a-14c, an output signal having fine pulse width is prevented from being generated.
申请公布号 JPH04301915(A) 申请公布日期 1992.10.26
申请号 JP19910089861 申请日期 1991.03.28
申请人 ANRITSU CORP 发明人 SEKIYA HITOSHI;NAKAMURA HISAFUMI
分类号 H03L7/00;H03H17/02 主分类号 H03L7/00
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