发明名称 SYSTEM FOR CONTROL OF BUS OUTPUT
摘要 PURPOSE:To prevent the influence of the noise generated between busses, by transmitting data onto an output bus divisionally in accordance with the bus to be used. CONSTITUTION:Data is prepared on an input bus 30 by an instruction in which the input bus 30 is concerned but an output bus 20 is not concerned, and this data and contents of a register A are operated. Though a signal CLOCK2 becomes L-level during the execution of this operation, a signal BUSOUT is not set to the H level because of the instruction where the bus 20 is not used in this execution cycle, and therefore, the output signal of a gate 40 is H-level, and data is stopped from being outputted by a gate 11. Next, when an instruction in which the bus 20 is concerned but the bus 30 is not concerned is issued, the signal CLOCK2 becomes H-level to execute the operation in this cycle. During this operation, the signal BUSOUT rises. After the operation, the signal CLOCK2 becomes L-level, and an OE signal is outputted with the L level from the gate 40. Thus the gate 11 is made enable to transmit data onto the bus 20.
申请公布号 JPS57125440(A) 申请公布日期 1982.08.04
申请号 JP19810010790 申请日期 1981.01.29
申请人 TOKYO SHIBAURA DENKI KK 发明人 NAKAMURA TOKUMITSU
分类号 G06F7/00;G06F15/78 主分类号 G06F7/00
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