发明名称 PEAK HOLDING CIRCUIT
摘要 PURPOSE:To reduce a voltage error and to limit a current by providing a differential amplifier, a capacitor, a switch, etc. CONSTITUTION:The differential amplifier 4, the capacitor 5, the switch 1, etc., are provided. Then, an input terminal 3 is connected to the uninverted input terminal of the amplifier 4. Then, a capacitor 5 is interposed between the inverted input terminal of the amplifier 4 and a reference potential and an output terminal 6 is led out from the inverted input terminal. Further, a current source 7 and the switch 1 for charging the capacitor 5 are interposed in series between a power source VCC and the amplifier 4. The switch 1 is controlled with the output of the amplifier 4. Namely, the switch is off when Vin<=Vp and on when Vp<Vin. In this case, Vin is an input signal and Vp is the charging voltage of the capacitor 5. Consequently, when Vin>Vp, the switch 1 is turned on to charge the capacitor 5 with a current value I0. When Vin<=Vp, on the other hand, the current value is zero and the capacitor 5 is held at the voltage Vp. Therefore, the maximum peak voltage of the input signal is held at the terminal 6.
申请公布号 JPS61155865(A) 申请公布日期 1986.07.15
申请号 JP19840276229 申请日期 1984.12.28
申请人 TOSHIBA CORP 发明人 YAMAMOTO TAKESHI
分类号 G01R19/04;G11C27/00;H03G3/30 主分类号 G01R19/04
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