发明名称 APPARATUS FOR GENERATING TEST PATTERN SIGNAL FOR LOGIC CIRCUIT
摘要 PURPOSE:To enable correct simulation by providing a timing compensating section for compensating timing of varying generated test patterns. CONSTITUTION:A timing compensating section 10 consists of a synthesizer 11 and a timing increase/decrease generator section 20. The generator 20 consists of a fixed value generator 21, a variable generator 22 and a random number generator 23, and generates timing compensating values for varying test pattern signals. The synthesizer 11 adds the timing compensating value generated by the generator 20 to the test pattern signals to change them. With this constitution, a pattern generator 4 generates a logical value and sends it to a synthesizer 6. A timing generator 5 generates reference timing TG1 to TGn and sends them to the synthesizer 6. The synthesizer 6 varies the logical value from the generator 4 with timing of the generator 5 and sends them to the synthesizer 11 of the compensating section 10. The compensating section 10 compensates the test pattern input to the synthesizer 11 with one of the timing compensating values from the generator 20 and generates a test pattern signal SIG1.
申请公布号 JPH02151781(A) 申请公布日期 1990.06.11
申请号 JP19880306731 申请日期 1988.12.03
申请人 RICOH CO LTD 发明人 NISHI HIDEAKI
分类号 G01R31/3183;G01R31/28;G06F11/22;G06F17/50 主分类号 G01R31/3183
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