| 摘要 |
<p>PURPOSE:To reduce the load of hardware by reducing signal processing speed at a digital part. CONSTITUTION:By arranging a time extension circuit 23 conventionally arranged between gamma correction circuits 21-1 to 21-3 and a D/A converter 25 at an input stage, a signal compressed in time to 11/12 on the side of transmission is extended in time to 12/11. Thus, the speed of an input signal can be reduced and digital signal processings subsequent to it can be calmly conducted.</p> |
