发明名称 |
Multi-mode DRAM controller |
摘要 |
The present invention provides a novel multi-mode DRAM controller adaptd to access DRAM chips of a main storage unit of different size and of different mode types. The novel DRAM controller comprises new address generation and control logic for delaying the RAS and CAS control signals to memory and for expanding the number of address bits employed to address memory chips having a greater number of addresses by at least one address bit.
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申请公布号 |
US5175835(A) |
申请公布日期 |
1992.12.29 |
申请号 |
US19900463067 |
申请日期 |
1990.01.10 |
申请人 |
UNISYS CORPORATION |
发明人 |
BEIGHE, EDWARD W.;LANNUTTI, ANTHONY P. |
分类号 |
F02B75/02;G06F12/06;G11C11/4076;G11C11/408 |
主分类号 |
F02B75/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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