发明名称 CONFIGURABLE LOGIC ELEMENT FOR FPGA
摘要 The invention provides a Configurable Logic Element (CLE) preferably included in each of an array of identical tiles. A CLE according to the invention has four function generators. The outputs of two function generators are combined with a fifth independent input in a five-input-function multiplexer or function generator to produce an output that can be any function of five inputs, or some functions of up to nine inputs. The outputs of the other two function generators are similarly combined. The outputs of the two five-input-function multiplexers or function generators are then combined with a sixth independent input in a first six-input-function multiplexer or function generator, and with a different sixth independent input in a second six-input-function multiplexer or function generator. According to another aspect of the invention, the CLE is implemented in two similar portions called "slices". Each slice has a separate carry chain. In a CLE with four function generators, each carry chain incorporates the outputs of two function generators.
申请公布号 WO9845947(A1) 申请公布日期 1998.10.15
申请号 WO1997US15366 申请日期 1997.08.28
申请人 XILINX, INC. 发明人 YOUNG, STEVEN, P.;BAPAT, SHEKHAR;CHAUDHARY, KAMAL;BAUER, TREVOR, J.;IWANCZUK, ROMAN
分类号 H01L25/00;H03K19/173;H03K19/177;(IPC1-7):H03K19/177 主分类号 H01L25/00
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