发明名称 MANUFACTURING METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To separate a control gate electrode between two cells in the direction of a word line without receiving an area penalty, thereby decreasing a coupling capacity among a control gate electrode, a bit line and the word line to enhance operation high speed. SOLUTION: A single layer of a dielectric film 2 and a first gate electrode (word gate electrode) 3 are layered on a first conduction type semiconductor 1, a plurality of dielectric films (charge accumulation film) 6 are formed on the first conductivity type semiconductor between the first gate electrodes 3, a conductor is embedded in a space between the first gate electrodes in the state that it is insulated from the first gate electrode, a mask layer 8 is formed upward of the first gate electrode, a side wall 9 is formed on the two sides of the mask layer 8, they are made an etching mask, the conductor is separated into two parts and a second gate electrode (control line CL) is formed.
申请公布号 JP2002261174(A) 申请公布日期 2002.09.13
申请号 JP20010058093 申请日期 2001.03.02
申请人 SONY CORP 发明人 TERANO TOSHIO
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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