发明名称 Process for fabricating Bi-CMOS integrated circuit
摘要 A process for fabricating a Bi-CMOS integrated circuit according to the present invention comprises the steps of growing a P-type epitaxial layer after formation of buried layers, forming N-type diffusion layers in the epitaxial layer for forming the P-channel MOS transistor, an NPN transistor and a PNP transistor.
申请公布号 US5179036(A) 申请公布日期 1993.01.12
申请号 US19910686429 申请日期 1991.04.17
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 MATSUMOTO, RYOICHI
分类号 H01L29/73;H01L21/331;H01L21/8249;H01L27/06;H01L29/732 主分类号 H01L29/73
代理机构 代理人
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