NON-VOLATILE MEMORY DEVICE HAVING CHARGE TRAPPING LAYER AND METHOD OF FABRICATING THE SAME
摘要
<p>A nonvolatile memory device having a charge trap layer and a method for manufacturing the same are provided to improve an erase operation speed without a recess characteristic degradation by using a stoichiometric silicon nitride layer and a silicon-rich silicon nitride layer as the charge trap layer. A tunneling layer(210) is arranged on a substrate(200). A charge trap layer(220) consists of a stoichiometric silicon nitride layer(221) and a silicon-rich silicon nitride layer(222) which are sequentially arranged on the tunneling layer. A blocking layer(230) is arranged on the charge trap layer to block the movement of charges. A control gate electrode(240) is arranged on the blocking layer. The tunneling layer is a silicon oxide(SiO2) layer. A thickness of the silicon oxide layer is at least 20 Å to 60 Å. A thickness of the charge trap layer is 60 Å to 180 Å. A thickness of the stoichiometric silicon nitride layer is 20 Å to 60 Å.</p>
申请公布号
KR20080036434(A)
申请公布日期
2008.04.28
申请号
KR20060103010
申请日期
2006.10.23
申请人
HYNIX SEMICONDUCTOR INC.
发明人
JOO, MOON SIG;YANG, HONG SEON;OM, JAE CHUL;PYI, SEUNG HO;LEE, SEUNG RYONG;KIM, YONG TOP