Extended multiply

摘要

Techniques are disclosed relating to performing extended multiplies without a carry flag. In one embodiment, an apparatus includes a multiply unit configured to perform multiplications of operands having a particular width. In this embodiment, the apparatus also includes multiple storage elements configured to store operands for the multiply unit. In this embodiment, each of the storage elements is configured to provide a portion of a stored operand that is less than an entirety of the stored operand in response to a control signal from the apparatus. In one embodiment, the apparatus is configured to perform a multiplication of given first and second operands having a width greater than the particular width by performing a sequence of multiply operations using the multiply unit, using portions of the stored operands and without using a carry flag between any of the sequence of multiply operations.

主权项

1. A method, comprising:
multiplying, by a computer processor, two operands of a particular width in a base 2 representation and storing a result of the multiplying in one or more destination registers, wherein the multiplying includes:
performing, by a multiplier circuit, a sequence of multiply operations, wherein the multiplier circuit is configured to perform multiplications of operands having a maximum width that is smaller than the particular width; andusing, for each of the sequence of multiply operations, portions of each of the two operands as inputs to the multiplier circuit, wherein the portions are less than the entirety of each of the two operands and are represented in base 2;wherein, for one or more of the sequence of multiply operations, the computer processor stores a result using only a portion of one of the one or more destination registers; and wherein the sequence of multiply operations is performed by the multiplier circuit without using a carry flag between any of the multiply operations.