LEVEL 2 PROTOCOL PROCESSING APPARATUS HAVING SEPARATED DISTRIBUTED MEMORY

摘要

The level 2 protocol processing apparatus adapts a pair of RAM and arbitrator to improve reliability of a relay system. The apparatus includes a first and a second RAM (810a,810b) for storing message transmitted between a level 2 and a level 3 unit temporary, a first and a second internal abitrator (870a,870b) for abitrating between signal to access the RAMs through a first and a second connector, and signal generated by an internal processor, a processor (820) for processing message transmitted between the RAMs and the internal abitrators according to level 2 protocol, a ROM (830) for storing initilization program and debugging program, a RAM (840) for storing a level 2 protocol processing program, and a HDLC chip (850) for executing HDLC protocol.