发明名称 DMA CHAIN CONTROL SYSTEM
摘要 PURPOSE:To add commands with a single and simple procedure independently of the state of a channel to a chained DMA command by providing a final pointer pointing a final discriptor to the channel. CONSTITUTION:The final pointer pointing final discriptors 4-1, 2 is provided to the channel, a new discriptor to be added is prepared, and when processing commanded by a chained discriptor is executed upon the receipt of a notified chain restart command, the chain restart command is neglected, the new discriptor is processed, and when the processing is waiting for the position of the discriptor pointed by the final point register 5, after chain bits 2-1-3 provided in the final discriptor pointed in the final point register are on '1' level, the processing commanded by the discriptor provided newly is controlled for the execution.
申请公布号 JPS62119657(A) 申请公布日期 1987.05.30
申请号 JP19850260382 申请日期 1985.11.20
申请人 FUJITSU LTD 发明人 KAWATO YUTAKA;NARA TAKASHI;HATANO TAKASHI;KATO MIHARU;OKADA SUMIE
分类号 G06F13/28;G06F13/12 主分类号 G06F13/28
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